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Processors 4-bit 8-bit 12-bit 16-bit 18-bit 24-bit 31-bit 32-bit 36-bit 48-bit 60-bit 64-bit 128-bit Applications 16-bit 32-bit 64-bit Data Sizes nibble octet byte word dword qword
In computer architecture, 64-bit integers, memory addresses, or other data units are those that are at most 64 bits (8 octets) wide. Also, 64-bit CPU and ALU architectures are those that are based on registers, address buses, or data buses of that size. 64-bit is also a term given to a generation of computers in which 64-bit processors were the norm.
64-bit CPUs have existed in supercomputers since the 1970s (Cray-1, 1975; CDC 6000 series, 1964, were 60-bit) and in RISC-based workstations and servers since the early 1990s. In 2003 they were introduced to the (previously 32-bit) mainstream personal computer arena, in the form of the x86-64 and 64-bit PowerPC processor architectures.
Without further qualification, a 64-bit computer architecture generally has integer and addressing registers that are 64 bits wide, allowing direct support for 64-bit data types and addresses. However, a CPU might have external data buses or address buses with different sizes than the registers, even larger (the 32-bit Pentium had a 64-bit data bus, for instance). The term may also refer to the size of low-level data types, such as 64-bit floating-point numbers.
 Architectural implications
Processor registers are typically divided into several groups: integer, floating-point, SIMD, control, and often special registers for address arithmetic which may have various uses and names such as address, index or base registers. However, in modern designs, these functions are often performed by more general purpose integer registers. In most processors, only integer and/or address-registers can be used to address data in memory, the other types cannot. The size of these registers therefore normally limits the amount of directly addressable memory, even if there are registers, such as floating-point registers, that are wider.
Most high performance 32-bit and 64-bit processors (some notable exceptions are most ARM and 32-bit MIPS CPUs) have integrated floating point hardware, which is often, but not always, based on 64-bit units of data. For example, although the x86/x87 architecture has instructions capable of loading and storing 64-bit (and 32-bit) floating-point values in memory, the internal data and register format is 80 bits wide. In contrast, the 64-bit Alpha family uses a 64-bit floating-point data and register format (as well as 64-bit integer registers).
Most CPUs are designed so that the contents of a single integer register can store the address (location) of any datum in the computer’s virtual memory. Therefore, the total number of addresses in the virtual memory — the total amount of data the computer can keep in its working area — is determined by the width of these registers. Beginning in the 1960s with the IBM System/360 (which was an exception, in that it used the low order 24 bits of a word for addresses, resulting in a 16 MB [16 × 10242 bytes] address space size), then (amongst many others) the DEC VAX minicomputer in the 1970s, and then with the Intel 80386 in the mid-1980s, a de facto consensus developed that 32 bits was a convenient register size. A 32-bit address register meant that 232 addresses, or 4 GB of RAM, could be referenced. At the time these architectures were devised, 4 GB of memory was so far beyond the typical quantities (4 MB) in installations that this was considered to be enough “headroom” for addressing. 4.29 billion addresses were considered an appropriate size to work with for another important reason: 4.29 billion integers are enough to assign unique references to most entities in applications like databases.
Some supercomputer architectures of the 1970s and 1980s used registers up to 64 bits wide. In the mid-1980s, Intel i860 development began culminating in a (too late for Windows NT) 1989 release. However, 32 bits remained the norm until the early 1990s, when the continual reductions in the cost of memory led to installations with quantities of RAM approaching 4 GB, and the use of virtual memory spaces exceeding the 4 GB ceiling became desirable for handling certain types of problems. In response, MIPS and DEC developed 64-bit microprocessor architectures, initially for high-end workstation and server machines. By the mid-1990s, HAL Computer Systems, Sun Microsystems, IBM, Silicon Graphics, and Hewlett Packard had developed 64-bit architectures for their workstation and server systems. A notable exclusion to this trend were mainframes from IBM, which then used 32-bit data and 31-bit address sizes. During the 1990s, several low-cost 64-bit microprocessors were used in consumer electronics and embedded applications. Notably, the Nintendo 64 and PlayStation 2 both had 64-bit microprocessors before its introduction in personal computers. High-end printers and network equipment, as well as industrial computers also used 64-bit microprocessors such as the Quantum Effect Devices R5000. 64-bit computing started to drift down to the personal computer desktop from 2003 onwards, when some models in Apple‘s Macintosh lines switched to PowerPC 970 processors (termed “G5” by Apple) and the launch of AMD‘s 64-bit x86-64 extension to the x86 architecture, itself a response to Intel‘s Itanium gaining early operating systems support.
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Most 64-bit microprocessors on the market today have an artificial limit on the amount of memory they can address, considerably lower than what might be expected from 64 bits. For example, the AMD64 architecture currently has a 52 bit limit on physical memory and only supports a 48-bit virtual address space. This is 4 PB (4 × 10245 bytes) and 256 TB (256 × 10244 bytes), respectively. A PC cannot contain 4 petabytes of memory (due to the size of current memory chips if nothing else) but AMD envisioned large servers, shared memory clusters, and other uses of physical address space that might approach this in the foreseeable future, and the 52 bit physical address provides ample room for expansion while not incurring the cost of implementing 64-bit physical addresses. Similarly, the 48-bit virtual address space was designed to provide more than 65,000 times the 32 bit limit of 4 GB (4 × 10243 bytes), allowing ample room for expansion in the near future without incurring the overhead of translating full 64-bit addresses.
 64-bit processor timeline
- 1961: IBM delivers the IBM 7030 Stretch supercomputer, which uses 64-bit data words and 32- or 64-bit instruction words.
- 1974: Control Data Corporation launches the CDC Star-100 vector supercomputer, which uses a 64-bit word architecture (previous CDC systems were based on a 60-bit architecture).
- 1974: International Computers Limited launches the ICL 2900 Series with 32-bit, 64-bit, and 128-bit two’s complement integers; 64-bit and 128-bit floating point; 32-bit, 64-bit and 128-bit packed decimal and a 128-bit accumulator register. The architecture has survived through a succession of ICL and Fujitsu machines. The latest is the Fujitsu Supernova, which emulates the original environment on 64-bit Intel processors.
- 1976: Cray Research delivers the first Cray-1 supercomputer, which is based on a 64-bit word architecture and will form the basis for later Cray vector supercomputers.
- 1983: Elxsi launches the Elxsi 6400 parallel minisupercomputer. The Elxsi architecture has 64-bit data registers but a 32-bit address space.
- 1991: MIPS Technologies produces the first 64-bit microprocessor, the R4000, which implements the MIPS III ISA, the third revision of their MIPS architecture. The CPU is used in SGI graphics workstations starting with the IRIS Crimson. Kendall Square Research deliver their first KSR1 supercomputer, based on a proprietary 64-bit RISC processor architecture running OSF/1.
- 1992: Digital Equipment Corporation (DEC) introduces the pure 64-bit Alpha architecture which was born from the PRISM project.
- 1993: Atari introduces the Atari Jaguar video game console, which includes some 64-bit wide data paths in its architecture.
- 1994: Intel announces plans for the 64-bit IA-64 architecture (jointly developed with Hewlett-Packard) as a successor to its 32-bit IA-32 processors. A 1998 to 1999 launch date is targeted. SGI releases IRIX 6.0, with 64-bit support for the R8000 chip set.
- 1995: Sun launches a 64-bit SPARC processor, the UltraSPARC. Fujitsu-owned HAL Computer Systems launches workstations based on a 64-bit CPU, HAL’s independently designed first-generation SPARC64. IBM releases the A10 and A30 microprocessors, 64-bit PowerPC AS processors. IBM also releases a 64-bit AS/400 system upgrade, which can convert the operating system, database and applications.
- 1996: Nintendo introduces the Nintendo 64 video game console, built around a low-cost variant of the MIPS R4000. HP releases an implementation of the 64-bit 2.0 version of their PA-RISC processor architecture, the PA-8000.
- 1997: IBM releases the RS64 line of 64-bit PowerPC/PowerPC AS processors.
- 1998: IBM releases the POWER3 line of full-64-bit PowerPC/POWER processors.
- 1999: Intel releases the instruction set for the IA-64 architecture. AMD publicly discloses its set of 64-bit extensions to IA-32, called x86-64 (later branded AMD64).
- 2000: IBM ships its first 64-bit z/Architecture mainframe, the zSeries z900. z/Architecture is a 64-bit version of the 32-bit ESA/390 architecture, a descendant of the 32-bit System/360 architecture.
- 2001: Intel finally ships its 64-bit processor line, now branded Itanium, targeting high-end servers. It fails to meet expectations due to the repeated delays in getting IA-64 to market.
- 2003: AMD introduces its Opteron and Athlon 64 processor lines, based on its AMD64 architecture which is the first x86 based 64 bit processor architecture. Apple also ships the 64-bit “G5” PowerPC 970 CPU courtesy of IBM. Intel maintains that its Itanium chips would remain its only 64-bit processors.
- 2004: Intel, reacting to the market success of AMD, admits it has been developing a clone of the AMD64 extensions named IA-32e (later renamed EM64T, then yet again renamed to Intel 64). Intel also ships updated versions of its Xeon and Pentium 4 processor families supporting the new instructions.
- 2004: VIA Technologies announces the Isaiah 64-bit processor.
- 2006: Sony, IBM, and Toshiba begin manufacturing of the 64-bit Cell processor for use in the PlayStation 3, servers, workstations, and other appliances.
 64-bit operating system timeline
- 1985: Cray releases UNICOS, the first 64-bit implementation of the Unix operating system.
- 1993: DEC releases the 64-bit DEC OSF/1 AXP Unix-like operating system (later renamed Tru64 UNIX) for its systems based on the Alpha architecture.
- 1995: DEC releases OpenVMS 7.0, the first full 64-bit version of OpenVMS for Alpha.
- 1996: Support for the 64-bit MIPS R4000 processor is added by Silicon Graphics to the IRIX operating system in release 6.2.
- 1998: Sun releases Solaris 7, with full 64-bit UltraSPARC support.
- 2000: IBM releases z/OS, a 64-bit operating system descended from MVS, for the new zSeries 64-bit mainframes; 64-bit Linux on zSeries follows the CPU release almost immediately.
- 2001: NetBSD is the first operating system to run on the Intel Itanium processor at the processor’s release. Further, Microsoft releases Windows XP 64-Bit Edition, also for the Itanium’s IA-64 architecture, although it was able to run 32-bit applications through an execution layer.
- 2003: Apple releases its Mac OS X 10.3 “Panther” operating system which adds support for native 64-bit integer arithmetic on PowerPC 970 processors. Several Linux distributions release with support for AMD64. Microsoft announces plans to create a version of its Windows operating system to support the AMD64 architecture, with backwards compatibility with 32-bit applications. FreeBSD releases with support for AMD64.
- 2005: On January 31, Sun releases Solaris 10 with support for AMD64 and EM64T processors. On April 29, Apple releases Mac OS X 10.4 “Tiger” which provides limited support for 64-bit command-line applications on machines with PowerPC 970 processors; later versions for Intel-based Macs supported 64-bit command-line applications on Macs with EM64T processors. On April 30, Microsoft releases Windows XP Professional x64 Edition for AMD64 and EM64T processors.
- 2006: Microsoft releases Windows Vista, including a 64-bit version for AMD64/EM64T processors that retains 32-bit compatibility. In the 64-bit version, all Windows applications and components are 64-bit, although many also have their 32-bit versions included for compatibility with plugins.
- 2007: Apple releases Mac OS X 10.5 “Leopard”, which fully supports 64-bit applications on machines with PowerPC 970 or EM64T processors.
- 2009: Apple releases Mac OS X 10.6, “Snow Leopard,” which is shipped with a 64-bit kernel for AMD64/Intel64 processors, although only certain recent models of Apple computers will run the 64-bit kernel by default. Most applications bundled with Mac OS X 10.6 are now also 64-bit. Microsoft releases Windows 7, which, like Windows Vista, includes a full 64-bit version for AMD64/Intel 64 processors; most new computers are loaded by default with a 64-bit version. It also releases Windows Server 2008 R2, which is the first 64-bit only operating system released by Microsoft.
 32- vs 64-bit
A change from a 32-bit to a 64-bit architecture is a fundamental alteration, as most operating systems must be extensively modified to take advantage of the new architecture. Other software must also be ported to use the new capabilities; older software is usually supported through either a hardware compatibility mode (in which the new processors support the older 32-bit version of the instruction set as well as the 64-bit version), through software emulation, or by the actual implementation of a 32-bit processor core within the 64-bit processor (as with the Itanium processors from Intel, which include an x86 processor core to run 32-bit x86 applications). The operating systems for those 64-bit architectures generally support both 32-bit and 64-bit applications.
One significant exception to this is the AS/400, whose software runs on a virtual ISA, called TIMI (Technology Independent Machine Interface) which is translated to native machine code by low-level software before being executed. The low-level software is all that has to be rewritten to move the entire OS and all software to a new platform, such as when IBM transitioned their line from the older 32/48-bit “IMPI” instruction set to 64-bit PowerPC (IMPI wasn’t anything like 32-bit PowerPC, so this was an even bigger transition than from a 32-bit version of an instruction set to a 64-bit version of the same instruction set).
While 64-bit architectures indisputably make working with large data sets in applications such as digital video, scientific computing, and large databases easier, there has been considerable debate as to whether they or their 32-bit compatibility modes will be faster than comparably-priced 32-bit systems for other tasks. In x86-64 architecture (AMD64), the majority of the 32-bit operating systems and applications are able to run smoothly on the 64-bit hardware.
A compiled Java program can run on a 32 bit or 64 bit Java virtual machine without modification. The lengths and precision of all the built in types are specified by the standard and are not dependent on the underlying architecture. Java programs that run on a 64 bit Java virtual machine have access to a larger address space.
Speed is not the only factor to consider in a comparison of 32-bit and 64-bit processors. Applications such as multi-tasking, stress testing, and clustering—for HPC (high-performance computing)—may be more suited to a 64-bit architecture when deployed appropriately. 64-bit clusters have been widely deployed in large organizations such as IBM, HP and Microsoft, for this reason.
 Pros and cons
A common misconception is that 64-bit architectures are no better than 32-bit architectures unless the computer has more than 4 GB of main memory. This is not entirely true:
- Some operating systems and certain hardware configurations limit the physical memory space to 3 GB on IA-32 systems, due to much of the 3–4 GB region being reserved for hardware addressing; see 3 GB barrier. This is not present in 64-bit architectures, which can use 4 GB of memory and more. However, IA-32 processors from the Pentium II onwards allow for a 36-bit physical memory address space, using Physical Address Extension (PAE), which gives a 64 GB physical address range, of which up to 62 GB may be used by main memory; operating systems that support PAE may not be limited to 4GB of physical memory, even on IA-32 processors.
- Some operating systems reserve portions of process address space for OS use, effectively reducing the total address space available for mapping memory for user programs. For instance, Windows XP DLLs and other user mode OS components are mapped into each process’s address space, leaving only 2 to 3 GB (depending on the settings) address space available. This limit is currently much higher on 64-bit operating systems and does not realistically restrict memory usage.
- Memory-mapped files are becoming more difficult to implement in 32-bit architectures. A 4 GB file is no longer uncommon, and such large files cannot be memory mapped easily to 32-bit architectures; only a region of the file can be mapped into the address space, and to access such a file by memory mapping, those regions will have to be mapped into and out of the address space as needed. This is a problem, as memory mapping remains one of the most efficient disk-to-memory methods, when properly implemented by the OS.
- Some programs such as data encryption software can benefit greatly from 64-bit registers (if the software is 64-bit compiled) and effectively execute 3 to 5 times faster on 64-bit than on 32-bit.
The main disadvantage of 64-bit architectures is that relative to 32-bit architectures, the same data occupies more space in memory (due to swollen pointers and possibly other types and alignment padding). This increases the memory requirements of a given process and can have implications for efficient processor cache utilization. Maintaining a partial 32-bit model is one way to handle this and is in general reasonably effective. For example, the z/OS operating system takes this approach currently, requiring program code to reside in 31-bit address spaces (the high order bit is not used in address calculation on the underlying hardware platform) while data objects can optionally reside in 64-bit regions.
Currently, most proprietary x86 software is compiled into 32-bit code, with less being also compiled into 64-bit code (although the trend is rapidly equalizing), so much does not take advantage of the larger 64-bit address space or wider 64-bit registers and data paths on x86 processors, or the additional registers in 64-bit mode. However, users of most RISC platforms, and users of free or open source operating systems (where the source code is available for recompiling with a 64-bit compiler) have been able to use exclusive 64-bit computing environments for years due to the likelihood of the existence of someone willing to compile the code thusly. Not all such applications require a large address space nor manipulate 64-bit data items, so they wouldn’t benefit from the larger address space or wider registers and data paths. The main advantage to 64-bit versions of such applications is the ability to access more registers in the x86-64 architecture.
 Software availability
x86-based 64-bit systems sometimes lack equivalents to software that is written for 32-bit architectures. The most severe problem in Microsoft Windows is incompatible device drivers. Most application software can run in a 32-bit compatibility mode, also known as an emulation mode, e.g. Microsoft WoW64 Technology for IA64 and AMD64. The 64-bit Windows Native Mode driver environment runs atop 64-bit NTDLL.DLL which cannot call 32-bit Win32 subsystem code (often devices whose actual hardware function is emulated in user mode software, like Winprinters). Because 64-bit drivers for most devices were not available until early 2007, using 64-bit Microsoft Windows operating system was considered impractical. However, the trend is changing towards 64-bit computing as most manufacturers provide both 32-bit and 64-bit drivers nowadays, so this issue is most likely to occur when attempting to use older peripherals. It should be noted that this is less of a problem with open source drivers that are already available for a 32-bit OS, since they can be modified to be 64-bit compatible, if necessary.
On most Macs, Mac OS X runs with a 32-bit kernel even on 64-bit-capable processors, but the 32-bit kernel can run 64-bit user-mode code; this allows those Macs to support 64-bit processes while still supporting 32-bit device drivers.
 64-bit data models
Converting application software written in a high-level language from a 32-bit architecture to a 64-bit architecture varies in difficulty. One common recurring problem is that some programmers assume that pointers have the same length as some other data type. These programmers assume they can transfer quantities between these data types without losing information. Those assumptions happen to be true on some 32-bit machines (and even some 16-bit machines), but they are no longer true on 64-bit machines. This common mistake is often called “the heresy that ‘all the world’s a VAX.'”. The C programming language and its descendant C++ make it particularly easy to make this sort of mistake. Differences between the C89 and C99 language standards also exacerbate the problem.
To avoid this mistake in C and C++, the
sizeofoperator can be used to determine the size of these primitive types if decisions based on their size need to be made, both at compile- and run-time. Also, the <limits.h> header in the C99 standard, and numeric_limits class in <limits> header in the C++ standard, give more helpful info; sizeof only returns the size in chars. This used to be misleading, because the standards leave the definition of the
CHAR_BITmacro, and therefore the number of bits in a char, to the implementations. However, except for those compilers targeting DSPs, “64 bits == 8 chars of 8 bits each” has become the norm.
One needs to be careful to use the
ptrdiff_ttype (in the standard header
<stddef.h>) for the result of subtracting two pointers; too much code incorrectly uses “int” or “long” instead. To represent a pointer (rather than a pointer difference) as an integer, use
uintptr_twhere available (it is only defined in C99, but some compilers otherwise conforming to an earlier version of the standard offer it as an extension).
Neither C nor C++ define the length of a pointer, int, or long to be a specific number of bits. In C99, however, stdint.h provides names for integer types with certain numbers of bits where those types are available.
 Specific C-language data models
In most programming environments on 32-bit machines, pointers, “int” (that is, integer) types, and “long” (that is, long integer) types are all 32 bits wide.
However, in many programming environments on 64-bit machines, “int” variables are still 32 bits wide, but long integers and pointers are 64 bits wide. These are described as having an LP64 data model. Another alternative is the ILP64 data model in which all three data types are 64 bits wide, and even SILP64 where “short” integers are also 64 bits wide. However, in most cases the modifications required are relatively minor and straightforward, and many well-written programs can simply be recompiled for the new environment without changes. Another alternative is the LLP64 model, which maintains compatibility with 32-bit code by leaving both int and long as 32-bit. “LL” refers to the “long long integer” type, which is at least 64 bits on all platforms, including 32-bit environments.
64-bit data models
Data model short (integer) int long (integer) long long pointers Sample operating systems LLP64 16 32 32 64 64 Microsoft Windows (X64/IA64) LP64 16 32 64 64 64 Most Unix and Unix-like systems, e.g. Solaris, Linux, and Mac OS X ILP64 16 64 64 64 64 HAL Computer Systems port of Solaris to SPARC64 SILP64 64 64 64 64 64 ?
Many 64-bit compilers today use the LP64 model (including Solaris, AIX, HP-UX, Linux, Mac OS X, FreeBSD, and IBM z/OS native compilers). Microsoft’s Visual C++ compiler uses the LLP64 model. The disadvantage of the LP64 model is that storing a long into an int may overflow. On the other hand, casting a pointer to a long will work. In the LLP model, the reverse is true. These are not problems which affect fully standard-compliant code but code is often written with implicit assumptions about the widths of integer types.
Note that a programming model is a choice made on a per-compiler basis, and several can coexist on the same OS. However, the programming model chosen as the primary model for the OS API typically dominates.
Another consideration is the data model used for drivers. Drivers make up the majority of the operating system code in most modern operating systems (although many may not be loaded when the operating system is running). Many drivers use pointers heavily to manipulate data, and in some cases have to load pointers of a certain size into the hardware they support for DMA. As an example, a driver for a 32-bit PCI device asking the device to DMA data into upper areas of a 64-bit machine’s memory could not satisfy requests from the operating system to load data from the device to memory above the 4 gigabyte barrier, because the pointers for those addresses would not fit into the DMA registers of the device. This problem is solved by having the OS take the memory restrictions of the device into account when generating requests to drivers for DMA, or by using an IOMMU.
 Current 64-bit microprocessor architectures
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- The 64-bit extension created by AMD to Intel’s x86 architecture (later licensed by Intel); commonly known as “x86-64“, “AMD64”, or “x64”:
- AMD’s AMD64 extensions (used in Athlon 64, Opteron, Sempron, Turion 64, Phenom, Athlon II and Phenom II processors)
- Intel‘s Intel 64 extensions (used in newer Celeron, Pentium 4, Pentium D, Xeon, Core 2, Core i3, Core i5, Core i7, and Atom processors)
- VIA Technologies‘ 64-bit extensions, used in the VIA Nano processors
- Power Architecture:
- IBM’s POWER6 processor
- IBM’s PowerPC 970 processor
- The Cell Broadband Engine used in the PlayStation 3, designed by IBM, Toshiba and Sony, combines a 64-bit Power architecture processor with seven or eight Synergistic Processing Elements.
- IBM’s “Xenon” processor used in the Microsoft Xbox 360 comprises three 64-bit PowerPC cores.
- SPARC V9 architecture:
- IBM’s z/Architecture, used by IBM zSeries and System z9 mainframes, a 64-bit version of the ESA/390 architecture
- Intel’s IA-64 architecture (used in Itanium processors)
- MIPS Technologies‘ MIPS64 architecture
Most 64-bit processor architectures can execute code for the 32-bit version of the architecture natively without any performance penalty. This kind of support is commonly called bi-arch support or more generally multi-arch support.
 See also
- ^ http://www.computer.org/portal/web/csdl/doi/10.1109/38.31467
- ^ Zachary, Showstopper!
- ^ AMD64 Programmer’s Manual Volume 2: System Programming, order number 24593, revision 3.14, September 2007, Advanced Micro Devices
- ^ Joe Heinrich: “MIPS R4000 Microprocessor User’s Manual, Second Edition”, 1994, MIPS Technologies, Inc.
- ^ Richard L. Sites: “Alpha AXP Architecture”, Digital Technical Journal, Volume 4, Number 4, 1992, Digital Equipment Corporation.
- ^ Atari Jaguar History. AtariAge. Retrieved 9 August 2010.
- ^ Linley Gwennap: “UltraSparc Unleashes SPARC Performance”, Microprocessor Report, Volume 8, Number 13, 3 October 1994, MicroDesign Resources.
- ^ J. W. Bishop, et al.: “PowerPC AS A10 64-bit RISC microprocessor”, IBM Journal of Research and Development, Volume 40, Number 4, July 1996, IBM Corporation.
- ^ Linley Gwennap: “PA-8000 Combines Complexity and Speed”, Microprocessor Report, Volume 8, Number 15, 14 November 1994, MicroDesign Resources.
- ^ F. P. O’Connell and S. W. White: “POWER3: The next generation of PowerPC processors”, IBM Journal of Research and Development, Volume 44, Number 6, November 2000, IBM Corporation.
- ^ “VIA Unveils Details of Next-Generation Isaiah Processor Core”. VIA Technologies, Inc.. http://www.via.com.tw/en/resources/pressroom/2004_archive/pr041005_fpf-isaiah.jsp. Retrieved 2007-07-18.